In systems that include high-speed chip-to-chip digital transmission circuits, channel attenuation of high-frequency signal components can degrade signal integrity and result in inter-symbol interference. In multi-gigabit per second single-ended chip-to-chip transmission, signal integrity degradation can prevent reliable system operation altogether.
Selectively amplifying a frequency range (equalization or “peaking”) may be used to compensate for channel attenuation and sharpen signal transition edges, thereby improving signal integrity. However, channel impedance and high-frequency attenuation components can vary depending on system design; furthermore, circuit parameters that determine receiver compensation can also vary across fabricated dies, resulting in potential mismatches between receiver compensation and actual channel properties. These combined variations can reduce effectiveness of conventional circuits with regard to compensating for channel loss. Furthermore, conventional solutions for matching receiver compensation to channel attenuation require complex tracking circuits that can consume significant power. Thus, there is a need for addressing these issues and/or other issues associated with the prior art.